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Freescale Semiconductor /SKEAZN642 /PORT /PUEL

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Interpret as PUEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PTAPE0 0 (0)PTAPE1 0 (0)PTAPE2 0 (0)PTAPE3 0 (0)PTAPE4 0 (0)PTAPE5 0 (0)PTAPE6 0 (0)PTAPE7 0 (0)PTBPE0 0 (0)PTBPE1 0 (0)PTBPE2 0 (0)PTBPE3 0 (0)PTBPE4 0 (0)PTBPE5 0 (0)PTBPE6 0 (0)PTBPE7 0 (0)PTCPE0 0 (0)PTCPE1 0 (0)PTCPE2 0 (0)PTCPE3 0 (0)PTCPE4 0 (0)PTCPE5 0 (0)PTCPE6 0 (0)PTCPE7 0 (0)PTDPE0 0 (0)PTDPE1 0 (0)PTDPE2 0 (0)PTDPE3 0 (0)PTDPE4 0 (0)PTDPE5 0 (0)PTDPE6 0 (0)PTDPE7

PTAPE3=0, PTCPE5=0, PTAPE5=0, PTAPE2=0, PTDPE5=0, PTAPE0=0, PTDPE1=0, PTCPE6=0, PTCPE3=0, PTCPE1=0, PTCPE7=0, PTAPE6=0, PTAPE1=0, PTBPE5=0, PTDPE0=0, PTDPE3=0, PTDPE4=0, PTCPE4=0, PTBPE2=0, PTBPE0=0, PTBPE7=0, PTCPE0=0, PTDPE6=0, PTAPE7=0, PTAPE4=0, PTBPE1=0, PTBPE6=0, PTBPE3=0, PTDPE7=0, PTBPE4=0, PTDPE2=0, PTCPE2=0

Description

Port Pullup Enable Low Register

Fields

PTAPE0

Pull Enable for Port A Bit 0

0 (0): Pullup is disabled for port A bit 0.

1 (1): Pullup is enabled for port A bit 0.
PTAPE1

Pull Enable for Port A Bit 1

0 (0): Pullup is disabled for port A bit 1.

1 (1): Pullup is enabled for port A bit 1.
PTAPE2

Pull Enable for Port A Bit 2

0 (0): Pullup is disabled for port A bit 2.

1 (1): Pullup is enabled for port A bit 2.
PTAPE3

Pull Enable for Port A Bit 3

0 (0): Pullup is disabled for port A bit 3.

1 (1): Pullup is enabled for port A bit 3.
PTAPE4

Pull Enable for Port A Bit 4

0 (0): Pullup is disabled for port A bit 4.

1 (1): Pullup is enabled for port A bit 4.
PTAPE5

Pull Enable for Port A Bit 5

0 (0): Pullup is disabled for port A bit 5.

1 (1): Pullup is enabled for port A bit 5.
PTAPE6

Pull Enable for Port A Bit 6

0 (0): Pullup is disabled for port A bit 6.

1 (1): Pullup is enabled for port A bit 6.
PTAPE7

Pull Enable for Port A Bit 7

0 (0): Pullup is disabled for port A bit 7.

1 (1): Pullup is enabled for port A bit 7.
PTBPE0

Pull Enable for Port B Bit 0

0 (0): Pullup is disabled for port B bit 0.

1 (1): Pullup is enabled for port B bit 0.
PTBPE1

Pull Enable for Port B Bit 1

0 (0): Pullup is disabled for port B bit 1.

1 (1): Pullup is enabled for port B bit 1.
PTBPE2

Pull Enable for Port B Bit 2

0 (0): Pullup is disabled for port B bit 2.

1 (1): Pullup is enabled for port B bit 2.
PTBPE3

Pull Enable for Port B Bit 3

0 (0): Pullup is disabled for port B bit 3.

1 (1): Pullup is enabled for port B bit 3.
PTBPE4

Pull Enable for Port B Bit 4

0 (0): Pullup is disabled for port B bit 4.

1 (1): Pullup is enabled for port B bit 4.
PTBPE5

Pull Enable for Port B Bit 5

0 (0): Pullup is disabled for port B bit 5.

1 (1): Pullup is enabled for port B bit 5.
PTBPE6

Pull Enable for Port B Bit 6

0 (0): Pullup is disabled for port B bit 6.

1 (1): Pullup is enabled for port B bit 6.
PTBPE7

Pull Enable for Port B Bit 7

0 (0): Pullup is disabled for port B bit 7.

1 (1): Pullup is enabled for port B bit 7.
PTCPE0

Pull Enable for Port C Bit 0

0 (0): Pullup is disabled for port C bit 0.

1 (1): Pullup is enabled for port C bit 0.
PTCPE1

Pull Enable for Port C Bit 1

0 (0): Pullup is disabled for port C bit 1.

1 (1): Pullup is enabled for port C bit 1.
PTCPE2

Pull Enable for Port C Bit 2

0 (0): Pullup is disabled for port C bit 2.

1 (1): Pullup is enabled for port C bit 2.
PTCPE3

Pull Enable for Port C Bit 3

0 (0): Pullup is disabled for port C bit 3.

1 (1): Pullup is enabled for port C bit 3.
PTCPE4

Pull Enable for Port C Bit 4

0 (0): Pullup is disabled for port C bit 4.

1 (1): Pullup is enabled for port C bit 4.
PTCPE5

Pull Enable for Port C Bit 5

0 (0): Pullup is disabled for port C bit 5.

1 (1): Pullup is enabled for port C bit 5.
PTCPE6

Pull Enable for Port C Bit 6

0 (0): Pullup is disabled for port C bit 6.

1 (1): Pullup is enabled for port C bit 6.
PTCPE7

Pull Enable for Port C Bit 7

0 (0): Pullup is disabled for port C bit 7.

1 (1): Pullup is enabled for port C bit 7.
PTDPE0

Pull Enable for Port D Bit 0

0 (0): Pullup is disabled for port D bit 0.

1 (1): Pullup is enabled for port D bit 0.
PTDPE1

Pull Enable for Port D Bit 1

0 (0): Pullup is disabled for port D bit 1.

1 (1): Pullup is enabled for port D bit 1.
PTDPE2

Pull Enable for Port D Bit 2

0 (0): Pullup is disabled for port D bit 2.

1 (1): Pullup is enabled for port D bit 2.
PTDPE3

Pull Enable for Port D Bit 3

0 (0): Pullup is disabled for port D bit 3.

1 (1): Pullup is enabled for port D bit 3.
PTDPE4

Pull Enable for Port D Bit 4

0 (0): Pullup is disabled for port D bit 4.

1 (1): Pullup is enabled for port D bit 4.
PTDPE5

Pull Enable for Port D Bit 5

0 (0): Pullup is disabled for port D bit 5.

1 (1): Pullup is enabled for port D bit 5.
PTDPE6

Pull Enable for Port D Bit 6

0 (0): Pullup is disabled for port D bit 6.

1 (1): Pullup is enabled for port D bit 6.
PTDPE7

Pull Enable for Port D Bit 7

0 (0): Pullup is disabled for port D bit 7.

1 (1): Pullup is enabled for port D bit 7.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data